Digital filter tree

ABSTRACT

The invention relates to a digital filter tree composed of a plurality of digital filter banks arranged in a tree structure one behind the other to branch out in stages with a separation into L.sub.ν individual signals taking place in each stage and the sampling rate being reduced each time by the factor M.sub.ν where ν=1,2, . . . identifies the νth stage. The filter tree employs a prototype filter with half-band functions for channel center frequencies f l  =l·B+B/2, with a real frequency multiplex input signal being separated into L.sub.ν complex channel signals for further processing by means of a discrete Fourier transformation. For all stages M.sub.ν =2 and L.sub.ν =4 are fixed, with only two signals of the L.sub.ν =4 being utilized. The arrangement permits adaptation of a hierarchical multi-stage method also to numbers of channels which are not equal to a power of two without changing the input sampling frequency and without the causing channels, whose number is fixed by the difference from the next higher power of two, to idle.

REFERENCE TO RELATED APPLICATIONS

This is a continuation-in-part of applicant's copending U.S. patentapplication Ser. No. 029,768, filed Mar. 24, 1987, U.S. Pat. No.4,792,943.

BACKGROUND OF THE INVENTION

The present invention relates to a tree arrangement of digital filterbanks, and more particularly to a tree of digital filter banks forfrequency multiplex signals.

Such digital filter banks as may be used in the present inventiondemultiplex and multiplex digitalized frequency multiplex signals. Priordigital banks of this type are disclosed, for example, in an article byF. M. Gardner "On-Board Procesing For Mobile Satellite Communications",published in Final Report: ESTEC Contract 5889/84, Palo Alto, Calif.,Gardner Research Company, May 2, 1985, and in an article, entitled"Comprehensive Survey of Digital Transmultiplexing Methods," by HelmutScheuermann and Heinz Gockler, in Proceedings of the IEEE 69 ofNovember, 1981, at pages 1419-1450. Among the drawbacks of known digitalfilter banks of this type are that FFT (fast Fourier transformation)algorithms which are adapted for processing complex signals cannot beused to their best advantage.

Improved digital filter banks are disclosed in the applicant'sabove-noted copending U.S. patent application No. 029,768, filed Mar.24, 1987. Such digital filter banks described in detail below are formedin circuit cells which include digital filter banks and permit optimumutilization of FFT algorithms.

The circuit of each cell includes a digital filter bank for effectingconversion between a frequency mulitiplex signal having a sampling ratef_(A) and L product sums corresponding to the sampled values of thefrequency multiplex signal, the pulse response of the filter bank beingof finite length, and a discrete Fourier transformation device foreffecting conversion between the product sums and L individual complexsignals. The sampling rate is reduced by the factor M≦L in thetransformation device so that only every Mth value of the product sumsis processed therein. In the filter bank, the frequency multiplex signalis a complex signal; the real portion and the imaginary portion of thissignal are delayed in respective delay member chains associated withpartial sequences of individual signal values which are sampled at arate of f_(A) /M. These signal values for the real portion and for theimaginary portion are each multiplied by the coefficients of the pulseresponse and the latter are each multiplied by complex coefficients andthe respective ith complex signals are summed to form the L productsums.

Filter banks of this type make possible optimum use of FFT algorithmsand are very efficient, i.e. they require few adders and multiplierswith respect to the intended purpose and demands for steepness,transmission and blocking ripple, etc. The above U.S. patent applicationNo. 029,768 also discloses a digital filter tree. That digital filtertree, whose block structure is illustrated in FIG. 8 of the priorapplication and in slightly simplified form in the FIG. 1 of thedrawings appended hereto, characterizes the so-called hierarchicalmulti-stage method HMM and is designed in such a manner that the statedform can be used for a number of channels corresponding to a power oftwo. Among the drawbacks of known digital filter trees such as thatdisclosed in the above U.S. patent application No. 029,768, are that FFT(fast Fourier transformation) algorithms which are adapted forprocessing complex signals cannot be used to their best advantage.

SUMMARY OF THE INVENTION

A circuit cell to be used in a digital filter tree according to theinvention includes a digital filter bank for effecting conversionbetween a frequency multiplexed signal and a plurality of weightedfilter signals, and a discrete Fourier transformation means connected tothe respective filter bank. The cells are connected to one another insuccessive stages in an outwardly branching tree structure such that,starting with the first stage, the frequency multiplexed signal isseparated into L.sub.ν individual complex signals appearing on separatelines at the νth stage, where ν=1, 2, . . . . The Fourier transformationmeans of each cell effects a discrete Fourier transformation between theweighted filter signals of the cell and the L.sub.ν individual complexsignals, and the sampling rate is reduced at the νth stage by M.sub.ν≦L.sub.ν. For all of the cells, for each cell of the νth stage: thefrequency multiplexed signal contains component signals each associatedwith a respective individual complex signal and having a bandwidthB.sub.ν : the weighted filter signals have the form ##EQU1## wherei.sub.ν =p·L.sub.ν +q,

q=0, 1, 2, . . . L.sub.ν -1, and

i.sub.ν, p, q=(0, 1, 2, 3, . . . );

the frequency multiplexed signal is s.sub.ν (k) and has a sampling rateof f_(A)ν ; h(i.sub.ν) is a coefficient representing a pulse response ofa finite length for i.sub.ν =0, 1, 2 . . . N.sub.ν -1;

the discrete Fourier transformation has the form ##EQU2## where s_(l)ν(kM.sub.ν) represents the individual complex signals and DFT {-} is thediscrete Fourier transformation, M.sub.ν is a sampling rate reductionfactor, M.sub.ν ≦L.sub.ν, and the discrete Fourier transformationinvolves sampling with respect to every M.sub.ν th value of the weightedfilter signals.

Each component signal of the frequency multiplexed signal is associatedwith a respective channel having a channel number, L.sub.ν, and a centerchannel frequency f_(l)ν =l.sub.ν ·B.sub.ν +B.sub.ν /2 and l.sub.ν =0,1, 2, . . . L.sub.ν -1. The frequency multiplexed input signal is acomplex signal, s_(D) (kT.sub.ν)=s_(r)ν (kT.sub.ν)+js_(i)ν (kT.sub.ν)with a real portion Re=s_(r)ν (kT.sub.ν) and an imaginary portionIm=s_(i)ν (kT.sub.ν), and k is a time factor= . . . , -1, 0, +1 . . . .

Each filter bank in the νth stage includes two chains of N.sub.ν -1delay members each having a delay of T.sub.ν+1 and each processing arespective portion of the complex signal, where N.sub.ν is the number ofsamples of the frequency multiplexed signal associated with each set ofweighted filter signal values output by the filter banks of the νthstage and T.sub.ν =1/f_(A)ν. Each filter bank also includes: (1)sampling means for sampling the signals associated with each delaymember at a rate corresponding to the sampling rate of the frequencymultiplexed signal reduced by M.sub.ν ; (2) a first processing means foreffecting conversion between each sample signal associated with a givendelay member and an associated weighted sample signal; and (3) a secondprocessing means for effecting conversion between selected weightedfilter signals and selected weighted sample signals.

It is the object of the invention to provide a digital filter tree ofthe above-mentioned type which makes it possible to modify thehierarchical multi-stage method HMM in such a manner that the totalnumber of channels to be demultiplexed is increased from the power oftwo L₀ =2^(i) to L', where L₀ <L'<2L₀ and with the input samplingfrequency f_(Ao) =4L₀.B being retained, where B is the channelbandwidth. This should also be possible without the demultiplexer beingdesigned for the next higher power of two, 2.L₀, in which case 2L₀ -L'channels would be idle. The realization of this objective should be asinexpensive as possible.

This may be accomplished by modifying the prior tree structure asdisclosed, for example in the above copending U.S. patent applicationNo. 029,768, so that for all stage ν, the reduction in the sampling ratefrom stage to stage is a constant value M.sub.ν =2 and the number ofcomplex signals output by each filter bank in each stage is a constantvalue L.sub.ν =4, and the frequency mulitplex signal for the first stageat the input side is real and the sampling rate at the input of thisfirst stage is cut in half. In accordance with another aspect of theinvention, in addition to the sampling rate reduction factor M.sub.νbeing equal to 2 and the number of individual complex signals appearingon separate lines L.sub.ν being equal to 4 for all stages ν, the firststage (ν=1) forms a true four-branch system having four output signalss₀ (2kT₁), s₁ (2kT₁), s₂ (2kT₁), s₃ (2kT₁), are each fed to thesubsequent stage; only two output signals of each of the cells of thenext following stages are input to subsequent stages; and the circuitfurther includes: (1) a prefilter having an output coupled to the firststage (ν=1) for producing the complex input signal s_(D) to the firststage by sampling at the rate 2f_(A1) from a real frequency multiplexinput signal s_(D) (kT₀), T₀ =T=1/f_(A0), and (2) means for spectrallyoffsetting the two partial spectra of s₁ and s₃ output by the firststage, which do not come to lie directly in the band 0 to f_(A1) /4.

The present digital filter tree has the advantages that the hierarchicalmulit-stage method HMM can be used unrestrictedly for generalapplications, i.e. also for numbers of channels which not equal a powerof two. The realization is inexpensive and the input sampling frequencyremains in effect. A further advantage is that the structure is mademore uniform in that exclusively identical HMM cells are required sothat the circuit becomes very well suitable for integrated realization.

BRIEF DESCRIPTION OF THE DRAWINGS

These and other features and advantages of the invention will be morecompletely understood from the following detailed description of thepreferred embdodiments with reference to the accompany drawings inwhich:

FIG. 1 is a block circuit diagram of a circuit cell portion including adigital filter bank which may be used in the digital filter treeaccording to the invention;

FIG. 2 is a circuit diagram of a filter circuit including the digitalfilter bank of FIG. 1;

FIG. 3 is a diagram of a circuit arrangement of part of the digitalfilter bank of FIG. 2;

FIGS. 4a-h are diagrams of several frequency spectra generated duringsignal processing by the digital filter bank;

FIGS. 5, 6 and 7 are circuit diagrams of particularly favorablerealizations corresponding to FIG. 3 of the digital filter bank;

FIG. 8 is a diagram of a hierarchical multistage tree structureemploying a plurality of digital filter banks;

FIG. 9 is a circuit diagram of a particularly favorable optimum circuitarrangement for a digital filter bank;

FIGS. 10a-c are diagrams of several frequency spectra generated duringsignal processing by the hierarchiacal multistage tree structure of FIG.8;

FIG. 11 is a simplified circuit diagram of the tree structure shown inFIG. 8 for a demultiplexer for 16 channels;

FIG. 12 is a circuit diagram of a DAF filter for use in the digitalfilter bank of FIG. 2, in which a complex output sample value isfurnished of every pair of two successive samples of the input sequence;

FIG. 13 shows a block structure of a simplified arrangement of thedigital filter bank, similar to that shown in FIG. 9;

FIG. 14 is a block diagram of the digital filter tree according to oneembodiment of the invention;

FIGS. 15a and 15b are diagrams of several frequency spectra generatedduring signal processing by the digital filter tree shown in FIG. 14;

FIG. 16 is a block diagram of the digital filter tree according toanother embodiment of the invention;

FIGS. 17a and 17b are diagrams of several frequency spectra generatedduring signal processing by the digital filter tree shown in FIG. 16.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The block in the center of FIG. 2 represents a digital filter bankDiFiBa. It is fed by a complex frequency multiplex signal s(kT) which,as shown by the example of FIG. 2, is generated by oversampling at arate 2f_(A) from a frequency multiplex signal FDM and subsequentfiltering by means of a digital anti-aliasing filter DAF, followed bynormal sampling at a rate f_(A) =1/T. The term k represents a timefactor, = . . . -2, -1, 0, +, +2 . . . , representative of the moment ofeach signal element.

The digital filter bank generates L complex signals which are then againprocessed, by means of a DFT (discrete Fourier transformation) or FFTprocessor, into L complex signals which are each demodulated on anindividual channel by means of a respective demodulator Dem.

FIG. 1 is a block circuit diagram showing the digital filter bankcomposed of a block for the real portion and a block for the imaginaryportion of the complex frequency multiplex signal. By processing at alow sampling rate, indicated by a perpendicularly downwardly orientedarrow, with a reduction factor M≦L, these blocks generate product sumsv_(r) (0) . . . v_(r) (L) from the real portion of signal s and v_(i)(0) . . . v_(i) (L) from the imaginary portion of signal s to serve asthe L complex input signals for the subsequent discrete or fast Fouriertransformation. This applies for channel center frequencies f_(l) =l·B,where l is the consecutive channel number and B the channel bandwidth.

For channel center frequencies f_(l) =l·B+B/2, the complex outputsignals of the two filter blocks must still be multiplied by the complexfactor exp (jπq/L), q=0 . . . L-1, before they are fed to the Fouriertransformer, as shown in FIG. 1, where the L input signals to theFourier Transformer (DFT) are distinguished by the index q and its Loutput signals by index 1.

FIG. 3 shows a processing block of the digital filter bank of FIG. 1composed of a chain of N-1=9 delay members each producing a time delayof T. The real portion s_(r) (kT), of the complex input signal, or theimaginary portion s_(i) (kT), enters into one end of this chain. TheN=10 sampling values of the signal sequence are sampled at a samplingrate 1/(MT) and are each multiplied by a coefficient h(0), . . . h(N-1)of the pulse response of the complex filter. Since 1/T represents theinput sampling rate of the system and 1/(MT) its output sampling rate, Mis the decimation ratio of the system. In essence, it can be set to anarbitrary integer with M≦L.

Then the products of h(0), h(M) . . . and the products of h(1), h(1+M) .. . etc. are added in selected combinations to form L=4 product sumsv_(r) (kM, 0), . . . v_(r) (kM, 3). The filter coefficients h(0), h(1),. . . , h(N-1) are obtained with standard programs for filter synthesis,such as that described by J. H. McClellan et al,: "A computer programfor designing optimum FIR linear phase digital filters", IEEE Trans.Audio Electroacoust. AU-21 (1973) 12, p. 506-526.

The arrangement described above for the real portion is also used forthe imaginary portion from which the product sums v_(i) (kM, 0), . . .v_(i) (kM, 3) are produced.

FIGS. 4a-h show the frequency spectra for a digital filter bank havingL=16 channels of which only l=3 to 13 are being used. The channel gridis designed for center frequencies f_(l) =l·B+B/2.

FIG. 4a shows the frequency spectrum s_(r) of the frequency mulitplexsignals as a result of analog bandwidth limitation and oversampling at asampling rate 2f_(A). Channels 3 to 13 are shown in the normal positionin the frequency range 0 to f_(A) and in the inverted position in thefrequency range f_(A) to 2f_(A).

FIG. 4b shows the frequency characteristic of the DAF filter of FIG. 2.It has a transmission behavior of |H_(DAF) (exp (j2πf/f_(A)))| withcomplex coefficients and, as shown, is provided with a transmissionrange that is symmetrical to f_(A) /2, thus making it most economical.

FIG. 4c shows the frequency spectrum s(exp (j2πf/f_(A))) of the complexsignal s(kT) after periodic sampling at f_(A) =1/T, with all channels 3to 13 being generated in the normal position in two frequency ranges.

FIG. 4d shows the transfer function |H_(prot) (exp (j2πf/f_(A)))| with atransmission range of -B/2 to +B/2 and filter transition regions eachhaving a width B. This transmission characteristic is repeated at themultiples of sampling rate f_(A).

In FIG. 4e the transfer function is shifted by fm=l·B=7B as a result ofcomplex modulation with exp (j2πfm/f_(A))=exp (j2πlB/f_(A))=exp(j2πl/L). The transfer function |H_(prot) (exp (j2πf/f_(A)))| is thetransfer function of a prototype filter, as defined in FIG. 4d, fromwhich all other slot transfer functions of the filter bank arederivable.

FIG. 4f shows the result of filtering by means of a filter having thecharacteristic shown in FIG. 4e. It shows channel 7 in the normalposition with vestiges of adjacent channels located at both sides due tothe transition regions.

FIGS. 4g and 4h show the frequency positions of channels having an oddnumber s₇ (exp (j2πLf/2f_(A))) and an even number s₈ (exp(j2πLf/2f_(A))) after the sampling frequency has been reduced by thefactor M=L/2.

FIG. 5 shows a polyphase embodiment of the digital filter bank for thespecial case of M=L and for channel center frequencies f_(l) =l·B orf_(l) =l·B+B/2. Shown, in representative form is the processing of thereal portion of the complex input signal. By means of a demultiplexer,represented by a rotating switch switching from one terminal to the nextat the rate f_(A), this succession of input signals s_(r) (kT) isdistributed at the sampling rate of f_(A) =1/T to M=L branches of delaymembers, each delay member having a delay of M·T. In each one of these Mbranches, every Mth value of the partial sequences is multiplied by thecoefficient h(i) where =μ+kM (for μ=0, 1, . . . M-1 and k=0, 1, 2, . . .N/M) and is then summed to form the individual product sums v_(r) (kM,μ).

The descisive advantage of this arrangement is that, except for theinput demultiplexer switch, all operations including storage and delayof the data is effected at the reduced output rate f_(A) /M.

FIG. 6 shows a modified polyphase network where the filter bankaccording to the invention is realized by M branches, where M=L/K, andfor channel center frequencies f_(l) =l·B or f_(l) =l·B+B/2, and where Kis an integer number such that the division of the integer L by Kresults in an integer M.

The processing unit for the real portion v_(r) (kT) of the complex inputsignal is again shown by way of example, an identical arrangement beingrequired for the imaginary portion. The input demultiplexer switchdistributes the input signal sequence at the sampling rate f_(A) =1/T tothe μ branches each having a chain of N/M-1 delay members. In eachchain, all Kth values of the partial sequence are combined by means of ksumming members to form the signals v_(r) (kM, μ) to v_(r) (kM, μ+L/K)for μ=0, 1, . . . , M-1.

FIG. 7 shows a modified polyphase embodiment of part of the digitalfilter bank for the case of L=4, M=3, N=9 and for channel centerfrequencies f_(l) =l·B or f_(l) =l·B+B/2. The processing unit for thereal portion of the complex input signal is shown by way of example. Theinput sequence is distributed by means of a demultiplexer switch tobranches μ=0, 1, 2, each including two delay members, with each delaymember producing a delay of 3T. The individual values of the partialsequences are multiplied, by means of coefficients h(i) of the pulseresponse of the filter, with i=0, 1, . . . to N-1=8 and the resultingproducts are added by means of L=4 summming members to form the productsums

    v0=h0+h4+h8,

    v1=h1+h5,

    v2=h2+h6, and

    v3=h3+h7.

The terms h0, h1, h2, . . . , h8 are product terms. In accordance withFIG. 7, we have, for instance:

    h0=s.sub.r (0·T)h(0)

    h4=s.sub.4 (4T)h(4)

    h8=s.sub.r (8T)h(8)

or

    v0=s.sub.r (0·T)+s.sub.r (4T)h(4)+s.sub.r (8T)h(8).

An exemplary set of coefficients h(0), . . . , h(8) is:

    h(0)=h(8)=0; h(1)=h(7)=-0.1112067;

    h(2)=h(6)=0; h(3)=h(5)=0.5251383; h(4)=0.6155718.

FIG. 8 shows a tree structure embodiment in which the complex inputsignal S_(D) (kT) is divided into complex individual signals in stages,each stage composed of filters H₁.sup.ν and H₀.sup.ν having complexcoefficients, in each stage the sampling rate being half that in thepreceding stage.

The blocks of FIG. 8 termed H₀.sup.ν |H₁.sup.ν with ν representing theνth stage=I, II, III, IV, V are given by FIG. 1 with L=4, where only twooutput signals of each block are exploited. H₀.sup.ν represents thetransfer function fo a complex lowpass filter and H₁.sup.ν that of acomplex bandpass filter, as defined in the characteristics shown in FIG.10c. All these filters have complex coefficients, indicated by theunderlining of the respective quantities. Furthermore, FIG. 10a showsagain the frequency response of the prototype filter H_(prot), fromwhich the transfer function H_(DAF) of the DAF (FIG. 10b) and those ofthe subsequent stages ν≠0 (FIG. 10c) are derived (see FIGS. 1 and 2).All terms beginning with capital S represent spectra at the input ofoutput ports of a stage filter cell H₀.sup.ν |H₁.sup.ν, which aredepicted in FIGS. 10a-c. The input sampling rate of the overall filterband is given by f_(si) =1/T.

FIG. 9 shows a particularly economical arrangement of a digital filterbank which additionally results in a particularly economicalconfiguration for the subsequent DFT processor. The arrangement resultsfor L=4, M=2, N=15 (where N=8μ-1, μ being an integer number as desired)and for channel center frequencies f_(l) =l·B+B/2.

Both a real portion and an imaginary portion are shown, both havingidentical structures. In the real portion as well as in the imaginaryportion, the complex input signal s(kT) is distributed, at the timing ofthe sampling frequency f_(A) =1/T, to two chains of delay members. Thefirst chain is composed of (N-1)/2=7 delay members each having a delayof 2T and the second chain is composed of a delay member having a delayof T(N-3)/2=6T. Since the coefficients h(i) for i=1, 3, 5, 9, 11, 13 arezero, only the output of this delay member 6T is multiplied by h7=1/2.The sampled values obtained at the first delay chain are multiplied byh0·√2, h2·√2, -h4·√2, -h6·√2 and, since the pulse response in thisexample is symmetrical, by h8·√2=h6·√2, h10·√2=h4·√2, -h12·√2=-h2··2 and-h14·√2=-h0·√2. Then, all M second products are summed to

    v.sub.r (0)=√2[h0·s.sub.r (k)-h4·s.sub.r (k-4)+h6·s.sub.r (k-8)-h2·s.sub.r (k-12)],

    v.sub.i (0)=√2[h0·s.sub.r (k)-h4·s.sub.r (k-4)+h6·s.sub.r (k-8)-h2·s.sub.r (k-12)],

    -v.sub.r (2)=√2[h2·s.sub.i (k-2)-h6·s.sub.i (k-6)+h4·s.sub.i (k-10)-h0·s.sub.i (k-14)],

    v.sub.i (2)=√2[h2·s.sub.r (k-2)-h6·s.sub.r (k-6)+h4·s.sub.r (k-10)-h0·s.sub.r (k-14)],

    as well as

    v.sub.r (3)=[s.sub.r (7T)-s.sub.i (7T)]·h7 and

    v.sub.i (3)=[s.sub.r (7T)+s.sub.i (7T)]·h7.

The quantities h0, h2, h4, h6 and h7 are the coefficients of theprototype filter H_(prot), the frequency response of which is defined inFIG. 10a (Filter synthesis as aforementioned). An exemplary set ofcoefficients is: h0=0, h2=0.018454, h4=-0.090328, h6=0.426544, h7=0.5.

Since v(1) is identical to 0, these three complex signals v(0), v(2) andv(3) form the complex input signals for the subsequent DFT processorwhich needs to perform merely a few summations and subtractions:

    s.sub.1r (2k)=v.sub.r (0)-v.sub.r (2)+v.sub.i (3),

    s.sub.0r (2k)=v.sub.r (0)+v.sub.r (2)+v.sub.r (3),

    s.sub.2r (2k)=v.sub.r (0)+v.sub.r (2)-v.sub.i (3),

    s.sub.3r (2k)=v.sub.r (0)-v.sub.r (2)-v.sub.i (3),

    s.sub.0i (2k)=v.sub.i (0)+v.sub.i (2)+v.sub.i (3),

    s.sub.1i (2k)=v.sub.i (0)-v.sub.i (2)-v.sub.r (3),

    s.sub.2i (2k)=v.sub.i (0)+v.sub.i (2)-v.sub.i (3),

    and

    s.sub.3i (2k)=v.sub.i (0)-v.sub.i (2)+v.sub.r (3).

In contrast to FIG. 9, if v(3)=0, μ being an integer number disappearsfor N=8μ+3; instead v(1)≠0. Otherwise the same relationships result.

Now follows a mathematical description of the digital filter bank forcomplex input and output signals.

The object is to filter out the complex input signal s(kT)=s(k) from theinput spectrum of the frequency multiplex signal by means of the filterH_(l) (exp (j2πf/f_(A))), having complex coefficients, where l_(l) (exp(j2πf/f_(A))) represents the transfer function of the digital filterbank for channel 1.

The pulse response (complex terms are underlined)

    h.sub.l (i)=h(i) exp (j2πl/L), i=0, 1, . . . , N-1      (1)

of the complex filter, derived by means of frequency shifting from thereal prototype filter h(i)=H_(prot) (exp (j2πf/f_(A))), the (complex)output signal results as a product of folding: ##EQU3##

The desired signal, which is related to the sampling frequency f_(A) /Mreduced by the factor M≦L, then results as follows: ##EQU4##

Blocks of a length L are now formed for suitable processing where

    i=Lp+q, with p=-∞ . . . ∞, q=0, 1, . . . L-1 (4)

Entered into (3), this results in ##EQU5##

The exponential term can here be simplified (p, l, LεN)

to

    e.sup.j2π(Lp+q)l/L =e.sup.j2πpl e.sup.j2πql/L =e.sup.j2πql/L (6)

By abbreviating the values v(kM,q) which are identical for all lchannels there then results: ##EQU6##

This is applicable for channel center frequencies f_(l) =l·B.

The realization of Equations (7) is shown essentially in FIGS. 1 and 3.First it is necessary to perform processing (Equation 7a) with thesampling frequency reduced by the factor M to arrive at the complexvalues v(km,q); see FIG. 3; here, the parts for calculation of the realportion are identical to those for the calculation of the imaginaryportion.

The complex values v(kM,q), l=0, . . . , L-1 must be subjected, as ablock, to a DFT of a length L. This optimally utilizes the efficiency ofthe DFT algorithm (or any desired FFT algorithm) since complex signalsare required as input as well as output values.

It is also possible to shift the channel grid by one-half a channelbandwidth or as desired by n/m (n, mεN; n<m) with respect to FIG. 4,where n and m are integer numbers and n<m.

Then, instead of (1), the following applies: ##EQU7##

Then Equation (5) reads as follows: ##EQU8## and the exponential term(6) n, mε/N, n<m, becomes ##EQU9##

Thus, Equations (7a) and (7b) become ##EQU10##

This also applies generally for channel center frequencies f_(l)=l·B+B·n/m.

The complex coefficients

    H(pL+q)=h(pL+q)e.sup.j2πpn/m e.sup.j2π(qn/Lm)        (11c)

take the place of the originally real coefficients h(pL+q), which, forthe calculation of the values v(kM,q), corresponds to doubling theoriginal number of multiplications and additions.

For m=2 and m=4, there also exists the possibility of calculatingv(kM,q) by way of ##EQU11## where m=2 is

    e.sup.j2πpn/2 =(-1).sup.np                              (12b)

and m=4 is

    e.sup.j2πpn/4 =j.sup.np                                 (12c)

Thus the effort required to calculate v(kM,q) of Equation (12a) andv(kM,q) of equation (7a) is identical

Finally, this results in

    v(kM,q)=v(kM,q)e.sup.J2π(qn/Lm)                         (12d)

which generally requires an additional four multiplications and twoadditions for each q=0, 1, . . . , L-1, if n≠0. Compared with the effortfor Equation (11), the effort for

Equation (12) is always less if

    4L<2N                                                      (13)

which is frequently the case.

Another possibility for m=2 and m=4 is to combine the factors exp(j2πqn/(Lm)) (Equation 12d) with the DFT to obtain an odd (0DFT), whichresults in a further reduction of effort.

It is known that any desired digital signal processing network can beconverted to a dual function network by transposition. For example, adigital filter bank for the frequency separation of frequency multiplexsignals can be converted, by means of the transposition method, into afilter bank for the frequency combination of individual signals into afrequency multiplex signal. For the above described structures, thismeans that all signal flow directions are reversed (i.e. exchange ofinput and output, adder becomes branching member, branching memberbecomes adder, DFT becomes inverse DFT). The method of transposingdigital networks is described in the article entitled, "On TheTransposition Of Linear Time-Varying Discrete-Time Networks And ItsApplication To Multirate Digital Systems", Philips J. Res., Volume 33,1978, pages 78-102.

FIG. 11 is a simplified circuit diagram of the tree structure shown inFIG. 8 for a demultiplexer for 16 channels. The digital filter treeincludes all identical cells H₀ and H₁ and has an anti-aliasing filterDAF at its input. The complex signal s₀ (2kT) produced by means of theDAF filter from the real input signal s_(D) (kT) is here divided intocomplex individual signals. This division occurs in stages eachemploying the stated filters H₀ and H₁ with complex coefficients and byeach time cutting the sampling rate in half.

FIG. 10a shows again the frequency response of the prototype filterH_(prot), from which the transfer function H_(DAF) of the DAF (FIG. 10b)and those of the subsequent stages ν≠0 (FIG. 10c) are derived (see FIGS.1 and 2). All terms beginning with capital S represent spectra at theinput and output ports of a stage filter cell H₀.sup.ν|H₁.sup.ν, whichare depicted in FIGS. 10a-c. The input sampling rate of the overallfilter bank is given by f_(Si) =1/T=f_(A0).

From FIGS. 10a-c which show the spectral relationships it is evidentthat the DAF filter as well as all cells Hλare derived from the sameprototype filter.

In detail, the following is shown in:

FIG. 10a, the spectrum of the halfband prototype filter for all HMMstages ν and the DAF stage;

FIG. 10b, the spectral relationships at the DAF filter, at the top forthe real input sequence s_(D) (kT) and the transfer function |H_(DAF)(e^(j)Ω)| and below it for the complex output sequence s_(D) (2kT) andbelow it for the frequency shifted spectrum S₀ ⁰ (e^(j2)Ω).

FIG. 10c shows the spectral relatonships for the HMM stages ν=I, II, IIIor IV, also downstream of the DAF filter. The symbol λ here representsthe slot number of the HMM stage under consideration and ν-I identifiesthe preceding stage while ν+I identifies the next following stage.

The top of the figure shows the transfer functions of the two filters H₀and H₁ as well as the spectra of their complex input signals. Below thatis the spectrum of the complex signal of the H₀ filter and below it thespectrum of the H₁ filter. At the very bottom is the shifted outputspectrum resulting from S₁ (exp(j2Ω.sup.ν)).

FIG. 12 is a circuit diagram of a DAF filter for use in the digitalfilter bank of FIG. 2, in which a complex output sample value isfurnished for every pair of two successive samples of the inputsequence.

FIG. 13 shows a block structure of a simplified arrangement of thedigital filter bank, similar to that shown in FIG. 9, as an example forfilters H₀ and H₁ ; it can be used to realize every one of the 15identical HMM filter cells of the demultiplexer of FIGS. 8 and 11.

In accordance with one aspect of the invention, for all stages ν, thereduction in the sampling rate from stage to stage is a constant valueM.sub.ν =2 and the number of individual complex signals appearing onseparate lines at the ν-th stage L.sub.ν =4 is fixed. Also, (1) thefirst stage (ν=1) forms a true four-branch system having four outputsignals s₀ (2kT₁), s₁ (2kT₁), s₂ (2kT₁), s₃ (2kT₁), which are each fedto the subsequent stage; (2) only two output signals of each of thecells of the next following stages are input to subsequent stages; andthe circuit further includes: (a) a prefilter having an output coupledto the first stage (ν=1) for producing the complex input signal s_(D) tothe first stage by sampling at the rate 2f_(A1) from a real frequencymultiplex input signal s_(D) (kT.sub. 0)=s_(D) (kT), and (b) means forspectrally offsetting the two partial spectra of s₁ and s₃ output by thefirst stage, which do not come to lie directly in the band 0 to f_(A1)/4.

FIG. 14 shows the block structure of a digital filter tree according toa first embodiment of the present application which functions in theabove manner. The associated spectral illustration is given in FIGS. 15aand 15b. The DAF filter is identical with that shown in FIG. 12,omitting the multiplications with sin kπ/2 and cos kπ/2 as well as thesubsequent adders. The DAF filter is followed by a cell having fouroutputs which is identical with the cell shown in FIG. 9. Allcoefficients could be multiplied with the factor γ/√2, with γ being thegeneral scale factor. The necessary multiplications with (-1)^(k) areshown in FIG. 4. The remaining cells H₀ and H₁ are identical with thatshown in FIG. 13.

In detail, the spectral representation in FIGS. 15a and 15b shows thefollowing:

the transfer function of the prototype filter for all HMM cells withν=I, . . . , but not for the DAF filter, corresponds to the diagram ofFIG. 10a.

FIG. 15a shows transfer functions |H_(DAF) (e^(j)Ω)| and the signalspectra |S_(D) (e^(j)Ω)| and |S_(D) (e^(j2)Ω)| of the DAF filter.Compared with FIG. 10b, it can be noted that, in contrast to thehalf-band version of FIG. 10b, where the transmission band and thetransition region as well as the stop band have the same widths, thepass band according to FIG. 15a is broader, and so is the stop band, andthe transition region is shortened correspondingly. In this broadenedtransmission range, channels are accommodated whose number goes beyondthe power of two L₀. The lower diagram of FIG. 15a shows the complexsignal spectrum |S_(D) (e^(j2)Ω)| after the sampling rate has been cutin half.

FIG. 15b shows the frequency spectra in a manner corresponding to FIG.10c, here for the four cells of the first stage, with the upper diagramshowing the four transfer functions H₀, H₁, H₂ and H₃ as well as theinput signal spectrum.

Below the upper diagram in FIG. 15b are shown the output spectra S₀ andS₂, while the diagram therebelow shows the spectra S₁ and S₃. Thelowermost diagram of FIG. 15b shows the spectra S₁ and S₃ after spectralshift into the base band.

In accordance with another aspect of the invention, for all stages ν,the reduction in the sampling rate from stage to stage is a constantvalue M.sub.ν =2 and the number of complex signals output by each filterbank in each stage is a constant value L₈₄ =4, and the frequencymultiplex signal for the first stage at the input side is real and thesampling rate at the input of this first stage is cut in half.

A block circuit which functions in this manner is particularly suitablefor integration and is shown in FIG. 16. In this case, all stages arerealized exclusively from the two filters H₀ and H₁. All blocks areidentical with FIG. 13. In stage I the imaginary portion of the inputsignal is identical to zero. Such a realization is also possible forL'=L₀. It must be emphasized that any scale factor can be employed inthe block circuit diagram of FIG. 13. The spectral relationships can befound in FIG. 17a where the transfer function of the prototype filter isthe same as that of the prototype filter of FIG. 10a and the signalspectrum is broadened in a corresponding manner over the range from zeroto fsi/2 in correspondence with the number of channels, i.e. for examplenot equal to a power of two.

In FIG. 17b, the signal spectra S₀ and S₁ are plotted one below theother, with the frequency shift of spectrum S₁ toward S'₀ beingconsidered in a further low diagram. The signal spectra identified belowFIG. 17b are the spectra of the first stage (ν=I); the frequency spectraof the subsequent stages are shown in FIG. 10c, or they correspond tothe above representation of FIG. 17b.

The invention now being fully described, it will be apparent to one ofordinary skill in the art that many changes and modifications can bemade thereto without departing from the spirit or scope of the inventionas set forth herein.

The present disclosure relates to the subject matter disclosed in GermanApplication No. P 36 10 195.8 of Mar. 26, 1986 and German ApplicationNo. P37 32 085.8 of Sept. 24, 1987, the entire specifications of whichare incorporated herein by reference.

What is claimed is:
 1. A frequency multiplex circuit including aplurality of digital filter cells, each including a digital filter bankfor effecting conversion between a frequency multiplexed signal and aplurality of weighted filter signals, and a discrete Fouriertransformation means connected to the respective filter bank, the cellsbeing connected to one another in successive stages in an outwardlybranching tree structure such that, starting with the first stage, thefrequency multiplexed signal is separated into L.sub.ν individualcomplex signals appearing on separate lines at the νth stage, where ν=1,2, . . . , the Fourier transformation means of each cell effecting adiscrete Fourier transformation between the weighted filter signals ofthe cell and the L.sub.ν individual complex signals, and the samplingrate is reduced at the νth stage by M.sub.ν ≦L.sub.ν, wherein for all ofsaid cells for each cell of the νth stage:the frequency multiplexedsignal contains component signals each associated with a respectiveindividual complex signal and having a bandwidth B.sub.ν ; the weightedfilter signals have the form ##EQU12## where i.sub.ν =p·L.sub.ν +q,q=0,1, 2, . . . L.sub.ν-1, and i.sub.ν, p, q=(0, 1, 2, 3, . . . ) thefrequency multiplexed signal is s.sub.ν (k) and has a sampling rate off_(A)ν ; h(i.sub.ν) is a coefficient representing a pulse response of afinite length for i.sub.ν =0, 1, 2 . . . N.sub.ν -1; the discreteFourier transformation has the form ##EQU13## where S_(l).sbsb.ν(kM.sub.ν) represents the individual complex signals andDFT {·} is thediscrete Fourier transformation, M.sub.ν is a sampling rate reductionfactor, M.sub.ν ≦L.sub.ν, and the discrete Fourier transformationinvolves sampling with respect to every M.sub.ν th value of the weightedfilter signals; each component signal of the frequency multiplexedsignal is associated with a respective channel having a channel number,l.sub.ν, and a center channel frequency f_(l).sbsb.ν =l.sub.ν ·B.sub.ν+B.sub.ν /2 and l.sub.ν =0, 1, 2, . . . L.sub.ν -1, the frequencymultiplexed signal is a complex signal, s_(D) (kT.sub.ν)=s_(r)ν(kT.sub.ν)+js_(i)ν (kT.sub.ν) with a real portion Re=s_(r)ν (kT.sub.ν)and an imaginary portion Im=s_(i)ν (kT.sub.ν), and k is a time factor= .. . , -1, 0, +1 . . . ; and each filter bank in the νth stagecomprising: two chains of N.sub.ν -1 delay members each having a delayof T.sub.ν+1 and each processing a respective portion of the complexsignal, where N.sub.ν is the number of samples of the frequencymultiplexed signal associated with each set of weighted filter signalvalues output by the filter banks of the νth stage and T.sub.ν =1/f_(A)ν; sampling means for sampling the signals associated with each delaymember at a rate corresponding to the sampling rate of the frequencymultiplexed signal reduced by M.sub.ν ; first processing means foreffecting conversion between each sample signal associated with a givendelay member and an associated weighted sample signal; and secondprocessing means for effecting conversion between selected weightedfilter signals and selected weighted sample signals; for all stages ν,the sampling rate reduction factor M.sub.ν =2 and the number ofindividual complex signals appearing on separate lines at the νth stageL.sub. =4 are fixed, with only two signals of the L.sub.ν =4 beingutilized; the frequency multiplex signal for the first stage ν=1 at theinput side is real and the sampling rate at the input of the first stageis cut in half.
 2. A frequency multiplex circuit including a pluralityof digital filter cells, each including a digital filter bank foreffecting conversion between a frequency multiplexed signal and aplurality of weighted filter signals, and a discrete Fouriertransformation means connected to the respective filter bank, the cellsbeing connected to one another in successive stages in an outwardlybranching tree structure such that, starting with the first stage, thefrequency multiplexed signal is separated into L.sub.ν individualcomplex signals appearing on separate lines at the νth stage, where ν=1,2, . . . , the Fourier transformation means of each cell effecting adiscrete Fourier transformation between the weighted filter signals ofthe cell and the L.sub.ν individual complex signals, and the samplingrate is reduced at the νth stage by M.sub.ν ≦L.sub.ν, wherein for all ofsaid cells for each cell of the νth stage:the frequency multiplexedsignal contains component signals each associated with a respectiveindividual complex signal and having a bandwidth B.sub.ν ; the weightedfilter signals have the form ##EQU14## where i.sub.ν =p·L.sub.ν +q,q=0,1, 2, . . . L.sub.ν-1, and i.sub.ν, p, q=(0, 1, 2, 3, . . . ) thefrequency multiplexed signal is s.sub.ν (k) and has a sampling rate off_(A)ν ; h(i.sub.ν) is a coefficient representing a pulse response of afinite length for i.sub.ν =0, 1, 2 . . . N.sub.ν -1; the discreteFourier transformation has the form ##EQU15## where s_(l).sbsb.ν(kM.sub.ν) represents the individual complex signals andDFT{·} is thediscrete Fourier transformation, M.sub.ν is a sampling rate reductionfactor, M.sub.ν ≦L.sub.ν, and the discrete Fourier transformationinvolves sampling with respect to every M.sub.νth value of the weightedfilter signals; each component signal of the frequency multiplexedsignal is associated with a respective channel having a channel number,l.sub.ν, and a center channel frequency

    f.sub.l.sbsb.ν =l.sub.ν ·B.sub.ν +B.sub.ν /2 and l.sub.ν =0, 1, 2, . . . L.sub.ν -1,

the frequency multiplexed signal is a complex signal, s_(D)(kT.sub.ν)=s_(r)ν (kT.sub.ν)+js_(i)ν (kT.sub.ν) with a real portionRe=s_(r)ν (kT.sub.ν) and an imaginary portion Im=s_(i)ν (kT.sub.ν), andk is a time factor= . . . , -1, 0, +1 . . . ; and each filter bank inthe νth stage comprising: two chains of N.sub.ν -1 delay members eachhaving a delay of T.sub.ν+1 and each processing a respective portion ofthe complex signal, where N.sub.ν is the number of frequency multiplexedsignal values associated with each set of weighted filter signal valuesoutput by the filter banks of the νth stage and T.sub.ν =1/f_(A)ν ;sampling means for sampling the signals associated with each delaymember at a rate corresponding to the sampling rate of the frequencymultiplexed signal reduced by M.sub.ν ; first processing means foreffecting conversion between each sample signal associated with a givendelay member and an associated weighted sample signal; and secondprocessing means for effecting conversion between selected weightedfilter signals and selected weighted sample signals; wherein for allstages ν the sampling rate reduction factor M.sub.ν =2 and the number ofindividual complex signals appearing on separate lines at the νth stageL.sub.ν =4 are fixed, the first stage (ν=1) forms a true four-branchsystem having four output signals s₀ (2kT₁), s₁ (2kT₁), s₂ (2kT₁), s₃(2kT₁), are each fed to the subsequent stage, and only two outputsignals of each of the cells of the next following stages are input tosubsequent stages; and the circuit further comprisinga prefilter havingan output coupled to the first stage (ν=1) for producing the complexinput signal s_(D) to the first stage by sampling at the rate 2f_(A1)from a real frequency multiplex input signal S_(D) (kT₀), and means forspectrally offsetting the two partial spectra of s₁ and s₃ output by thefirst stage, which do not come to lie directly in the band 0 to f_(A1)/4.